Texas Instruments AFE79 Series User Manual

PLL Register Map www.ti.com
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SBAU337–May 2020
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Serial Interface Register Maps
2.2.16 Register 71h (offset = 71h) [reset = 0h]
Figure 2-39. Register 71h
7 6 5 4 3 2 1 0
SYSREF_PULSE_CNT_FB
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-41. Register 71 Field Descriptions
Bit Field Type Reset Description
7-0 LCMGEN_DIV[7:0] R/W 0h Number of sysref pulses leak to FB.
2.2.17 Register 72h (offset = 72h) [reset = 0h]
Figure 2-40. Register 72h
7 6 5 4 3 2 1 0
SYSREF_PULSE_CNT_DIG
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-42. Register 72 Field Descriptions
Bit Field Type Reset Description
7-0 LCMGEN_DIV[7:0] R/W 0h Number of sysref pulses leak to DIGITAL.
2.2.18 Register 84h (offset = 84h) [reset = 0h]
Figure 2-41. Register 84h
7 6 5 4 3 2 1 0
CTL_LDOVCO_FBRES CTL_LDOVCO_VREF LDOVCO_FOR
CE_OUTTOVD
D
reserved reserved reserved
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-43. Register 84 Field Descriptions
Bit Field Type Reset Description
7-6
CTL_LDOVCO_FB
RES
R/W 0h
VFB_RES prog: resistance res(reg_value) is in the following
order with respect to the register value.
res(1) > res(0) > res(3) > res(2).
5-4
CTL_LDOVCO_VR
EF
R/W 0h
VREF LDO program. Voltage vol(reg_value) is in the following
order corresponding to the value of the register.
vol(2) > vol(3) > vol(0) > vol(1)
3-3
LDOVCO_FORCE
_OUTTOVDD
R/W 0h force PLL_LDO_OUT to AVDD_1P8V_VCO
2-2 reserved R/W 0h
1-1 reserved R/W 0h
0-0 reserved R/W 0h

Texas Instruments AFE79 Series Specifications

General

Brand	Texas Instruments
Model	AFE79 Series
Category	Control Unit
Language	English