DAC JESD Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.4.247 Register 13Bh (offset = 13Bh) [reset = 0h]
Figure 2-476. Register 13Bh
7 6 5 4 3 2 1 0
LINK1_SYNC_RELEASE_RBD_M1[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-480. Register 13B Field Descriptions
Bit Field Type Reset Description
7-0
LINK1_SYNC_REL
EASE_RBD_M1[15
:8]
R/W 0h
For lanes[2:3]/[6:7], By default in JESDB, syncz assertion
happens on a multiframe-end. We can use this register along
with the rbd_counter to time the syncz assertion. TO enable
this feature, we need to set lane_test_mode[1] to 1
2.4.248 Register 13Ch (offset = 13Ch) [reset = 0h]
Figure 2-477. Register 13Ch
7 6 5 4 3 2 1 0
LANE0_SKEW
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-481. Register 13C Field Descriptions
Bit Field Type Reset Description
4-0 LANE0_SKEW R 0h
JESDB: Measure lane0 skew from lane0 getting ctrl-R
character to all the lanes getting ctrl-R character
JESDC: Measure lane0 skew from lane0 getting emb-lock to
all the lanes getting emb-locks character
2.4.249 Register 13Dh (offset = 13Dh) [reset = 0h]
Figure 2-478. Register 13Dh
7 6 5 4 3 2 1 0
LANE1_SKEW
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-482. Register 13D Field Descriptions
Bit Field Type Reset Description
4-0 LANE1_SKEW R 0h
JESDB: Measure lane1 skew from lane1 getting ctrl-R
character to all the lanes getting ctrl-R character
JESDC: Measure lane1 skew from lane1 getting emb-lock to
all the lanes getting emb-locks character
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