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Texas Instruments AFE79 Series - 2.11.2 Register 101 h (offset = 101 h) [reset = 0 h]; 2.11.3 Register 102 h (offset = 102 h) [reset = 0 h]; 2.11.4 Register 103 h (offset = 103 h) [reset = 80 h]

Texas Instruments AFE79 Series
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Digital Top Register Map
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616
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
Table 2-1187. Register 100 Field Descriptions
Bit Field Type Reset Description
7-0
ALARM_MASK_LS
B_FOR_ALARM0[7
:0]
R/W 0h
Mask bits for alarm condition of LSB(first 16) alarm condtions.
A high value at a bit position indicates the corresponding
alarm condition is not used in the final alarm generation.
There are two alarms (0,1) and this one correspond to alarm0.
Bit0 -> Jesd subchip alarm.
Bit1 -> tx1_pap_alarm_out[0].
Bit2 -> tx2_pap_alarm_out[0].
Bit3 -> tx1_pap_alarm_out[1].
Bit4 -> tx2_pap_alarm_out[1].
Bit5 -> spi_alarms_out.
Bit6, Bit7 -> 0.
2.11.2 Register 101h (offset = 101h) [reset = 0h]
Figure 2-1177. Register 101h
7 6 5 4 3 2 1 0
ALARM_MASK_LSB_FOR_ALARM0[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1188. Register 101 Field Descriptions
Bit Field Type Reset Description
7-0
ALARM_MASK_LS
B_FOR_ALARM0[1
5:8]
R/W 0h
Mask bits for alarm condition of LSB(first 16) alarm condtions.
A high value at a bit position indicates the corresponding
alarm condition is not used in the final alarm generation.
There are two alarms (0,1) and this one correspond to alarm0.
Bit8 -> 0.
Bit9 -> PLL lock alarm.
Bit10 to Bit15 -> 0.
2.11.3 Register 102h (offset = 102h) [reset = 0h]
Figure 2-1178. Register 102h
7 6 5 4 3 2 1 0
ALARM_MASK_MSB_FOR_ALARM0[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1189. Register 102 Field Descriptions
Bit Field Type Reset Description
7-0
ALARM_MASK_M
SB_FOR_ALARM0
[7:0]
R/W 0h
Mask bits for alarm condition of MSB(last-16 )alarm condtions.
A high value at a bit position indicates the corresponding
alarm condition is not used in the final alarm generation.
There are two alarms (0,1) and this one correspond to alarm0.
Bit0 to Bit7 -> 0.
2.11.4 Register 103h (offset = 103h) [reset = 80h]
Figure 2-1179. Register 103h
7 6 5 4 3 2 1 0
ALARM_MASK_MSB_FOR_ALARM0[15:8]
R/W-80h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

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