ADC JESD Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-516. Register 34 Field Descriptions (continued)
Bit Field Type Reset Description
MODE_2S_141620_IQ = 39
MODE_2S_141220_IQ = 40
MODE_2S_24310_IQ = 41
MODE_2S_24610_IQ = 42
MODE_2S_14610_IQ = 43
MODE_2S_141210_IQ = 44
MODE_2S_42111_IQ = 45
MODE_2S_44840_IQ = 46
MODE_2S_VSWR_24410 = 50
2.5.16 Register 35h (offset = 35h) [reset = 0h]
Figure 2-512. Register 35h
7 6 5 4 3 2 1 0
0 0 RX2_JESD_MODE
R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset