RX Top Register Map
www.ti.com
772
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.13.200 Register 4DCh (offset = 4DCh) [reset = 0h]
Figure 2-1612. Register 4DCh
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_GAIN16[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1625. Register 4DC Field Descriptions
Bit Field Type Reset Description
7-0
RX_AGC_BAND0_
LNA_GAIN16[7:0]
R/W 0h
LNA Gain for Band0 for temp index 16 in case of External
LNA Control , Gain for DVGA Index 16 in case of External
DVGA control
2.13.201 Register 4DDh (offset = 4DDh) [reset = 0h]
Figure 2-1613. Register 4DDh
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_GAIN16[10:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1626. Register 4DD Field Descriptions
Bit Field Type Reset Description
2-0
RX_AGC_BAND0_
LNA_GAIN16[10:8]
R/W 0h
LNA Gain for Band0 for temp index 16 in case of External
LNA Control , Gain for DVGA Index 16 in case of External
DVGA control
2.13.202 Register 4DEh (offset = 4DEh) [reset = 0h]
Figure 2-1614. Register 4DEh
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_GAIN17[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1627. Register 4DE Field Descriptions
Bit Field Type Reset Description
7-0
RX_AGC_BAND0_
LNA_GAIN17[7:0]
R/W 0h
LNA Gain for Band0 for temp index 17 in case of External
LNA Control , Gain for DVGA Index 17 in case of External
DVGA control
2.13.203 Register 4DFh (offset = 4DFh) [reset = 0h]
Figure 2-1615. Register 4DFh
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_GAIN17[10:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset