Texas Instruments AFE79 Series - 2.4.80 Register 6 Fh (offset = 6 Fh) [reset = 1 Fh]; 2.4.81 Register 70 h (offset = 70 h) [reset = 0 h]; 2.4.82 Register 71 h (offset = 71 h) [reset = 0 h]; 2.4.83 Register 72 h (offset = 72 h) [reset = 0 h]

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Serial Interface Register Maps
2.4.80 Register 6Fh (offset = 6Fh) [reset = 1Fh]
Figure 2-309. Register 6Fh
7 6 5 4 3 2 1 0
LINK1_BUFFER_READ_PTR_OFFSET LINK1_BUFFER_DEPTH
R/W-0h R/W-1Fh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-313. Register 6F Field Descriptions
Bit Field Type Reset Description
7-5
LINK1_BUFFER_R
EAD_PTR_OFFSE
T
R/W 0h UNUSED
4-0
LINK1_BUFFER_D
EPTH
R/W 1Fh elastic buffer depth for lanes[2:3]/[6:7]
2.4.81 Register 70h (offset = 70h) [reset = 0h]
Figure 2-310. Register 70h
7 6 5 4 3 2 1 0
LINK0_INIT_O_COUNTER
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-314. Register 70 Field Descriptions
Bit Field Type Reset Description
7-0
LINK0_INIT_O_CO
UNTER
R/W 0h
For Lanes[0:1]/[4:5], on sysref to lmfc, the internal o
counter(JESDB)/mb_counter(JESDC) can be loaded with
init_o_counter value
2.4.82 Register 71h (offset = 71h) [reset = 0h]
Figure 2-311. Register 71h
7 6 5 4 3 2 1 0
LINK0_INIT_F_COUNTER
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-315. Register 71 Field Descriptions
Bit Field Type Reset Description
7-0
LINK0_INIT_F_CO
UNTER
R/W 0h
For Lanes[0:1]/[4:5], on sysref to lmfc, the internal f
counter(JESDB)/emb_counter(JESDC) can be loaded with
init_f_counter value
2.4.83 Register 72h (offset = 72h) [reset = 0h]
Figure 2-312. Register 72h
7 6 5 4 3 2 1 0
LINK1_INIT_O_COUNTER
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset