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Texas Instruments AFE79 Series - 2.5.11 Register 30 h (offset = 30 h) [reset = 0 h]; 2.5.12 Register 31 h (offset = 31 h) [reset = 0 h]

Texas Instruments AFE79 Series
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ADC JESD Register Map
379
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
Table 2-511. Register 2F Field Descriptions (continued)
Bit Field Type Reset Description
5-4
TDD_SHARED_DA
TA_SEL_LANE2
R/W 0h
Used to control lane 2/6 sharing for system_modes that
support TDD shared
0 - rx/fb shared dynamically
1 - rx
2 - fb
3-2
TDD_SHARED_DA
TA_SEL_LANE1
R/W 0h
Used to control STX2/6 sharing for system_modes that
support TDD shared
0 - rx/fb shared dynamically
1 - rx
2 - fb
1-0
TDD_SHARED_DA
TA_SEL_LANE0
R/W 0h
Used to control STX1/5 sharing for system_modes that
support TDD shared
0 - rx/fb shared dynamically
1 - rx
2 - fb
2.5.11 Register 30h (offset = 30h) [reset = 0h]
Figure 2-507. Register 30h
7 6 5 4 3 2 1 0
0 0 FB_DATA_ORDER_MUX_SEL RX3_RX4_DATA_ORDER_MUX
_SEL
RX_DATA_ORDER_MUX_SEL
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-512. Register 30 Field Descriptions
Bit Field Type Reset Description
7-6 0 R/W 0h Must read or write 0
5-4
FB_DATA_ORDER
_MUX_SEL
R/W 0h
0 -> FB1, FB2 or FB1 duplicated (depends on mapper mode)
1 -> RX2, FB2
3-2
RX3_RX4_DATA_
ORDER_MUX_SE
L
R/W 0h
0 -> RX3,RX4
1 -> FB1,FB2
1-0
RX_DATA_ORDER
_MUX_SEL
R/W 0h
0 -> RX1,RX2
1 -> RX1, FB1
2.5.12 Register 31h (offset = 31h) [reset = 0h]
Figure 2-508. Register 31h
7 6 5 4 3 2 1 0
SWAP_SAMPL
ES_FB_OVR
SWAP_SAMPLES_FB_VAL SWAP_SAMPL
ES_RX_OVR
SWAP_SAMPLES_RX_VAL
R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-513. Register 31 Field Descriptions
Bit Field Type Reset Description
7-7
SWAP_SAMPLES_
FB_OVR
R/W 0h
To be set to override internal swapping logic with SPI based
through mem_swap_samples_fb_val

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