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Texas Instruments AFE79 Series - 2.4.264 Register 14 Dh (offset = 14 Dh) [reset = 48 h]; 2.4.265 Register 14 Eh (offset = 14 Eh) [reset = 24 h]; 2.4.266 Register 150 h (offset = 150 h) [reset = 0 h]

Texas Instruments AFE79 Series
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DAC JESD Register Map
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368
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
Table 2-496. Register 14C Field Descriptions
Bit Field Type Reset Description
7-4
MAPPER_SYNC_F
IFO_TX2_OFFSET
_S4TO2
R/W 8h TESTMODE
3-0
MAPPER_SYNC_F
IFO_TX2_OFFSET
_S4TO4
R/W 8h TESTMODE
2.4.264 Register 14Dh (offset = 14Dh) [reset = 48h]
Figure 2-493. Register 14Dh
7 6 5 4 3 2 1 0
MAPPER_SYNC_FIFO_TX2_OFFSET_S2TO2 MAPPER_SYNC_FIFO_TX2_OFFSET_S4TO1
R/W-4h R/W-8h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-497. Register 14D Field Descriptions
Bit Field Type Reset Description
7-4
MAPPER_SYNC_F
IFO_TX2_OFFSET
_S2TO2
R/W 4h TESTMODE
3-0
MAPPER_SYNC_F
IFO_TX2_OFFSET
_S4TO1
R/W 8h TESTMODE
2.4.265 Register 14Eh (offset = 14Eh) [reset = 24h]
Figure 2-494. Register 14Eh
7 6 5 4 3 2 1 0
MAPPER_SYNC_FIFO_TX2_OFFSET_S1TO1 MAPPER_SYNC_FIFO_TX2_OFFSET_S2TO1
R/W-2h R/W-4h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-498. Register 14E Field Descriptions
Bit Field Type Reset Description
7-4
MAPPER_SYNC_F
IFO_TX2_OFFSET
_S1TO1
R/W 2h TESTMODE
3-0
MAPPER_SYNC_F
IFO_TX2_OFFSET
_S2TO1
R/W 4h TESTMODE
2.4.266 Register 150h (offset = 150h) [reset = 0h]
Figure 2-495. Register 150h
7 6 5 4 3 2 1 0
SERDES_FIFO
_PTR_SAMPL
E
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

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