SERDES Register Map
www.ti.com
482
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.6.50 Register 4084h (offset = 4084h) [reset = 2h]
Figure 2-764. Register 4084h
7 6 5 4 3 2 1 0
RX_PRBS_CO
UNT_RESET
RX_PRBS_MODE RX_PRBS_CH
ECK_EN
RX_POLARITY
_FLIP
R/W-0h R/W-0h R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-770. Register 4084 Field Descriptions
Bit Field Type Reset Description
5-5
RX_PRBS_COUNT
_RESET
R/W 0h
Resets the RX PRBS error count. User needs to set, then
clear this bit to resume accumulation.
3-2 RX_PRBS_MODE R/W 0h
PRBS mode select of the RX PRBS checker.
0h: PRBS9
1h: PRBS15
2h: PRBS23
3h: PRBS31
1-1
RX_PRBS_CHECK
_EN
R/W 1h
Enables the RX PRBS checker logic.
0h: Disabled
1h: Enabled
0-0
RX_POLARITY_FL
IP
R/W 0h
Polarity of the incoming RX (user) data.
0h: Normal
1h: Inverted
2.6.51 Register 4086h (offset = 4086h) [reset = 0h]
Figure 2-765. Register 4086h
7 6 5 4 3 2 1 0
OWEN_THETA
2_ACC
OW_THETA2_ACC
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-771. Register 4086 Field Descriptions
Bit Field Type Reset Description
7-7
OWEN_THETA2_A
CC
R/W 0h
Overwrite enable signal for OW_theta2_acc.
0h: Disable
1h Enable
6-0 OW_THETA2_ACC R/W 0h Overwrite value for theta4_acc 7MSB
2.6.52 Register 4087h (offset = 4087h) [reset = 0h]
Figure 2-766. Register 4087h
7 6 5 4 3 2 1 0
OWEN_PHASE
1_ACC
OW_PHASE1_ACC
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset