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JESD_SUBCHIP Register Map
205
SBAU337–May 2020
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Serial Interface Register Maps
Table 2-123. Register 97 Field Descriptions
Bit Field Type Reset Description
7-7
CLK_OBS_DONE_
INTR
R 0h Counter done status
2.3.80 Register 98h (offset = 98h) [reset = 0h]
Figure 2-121. Register 98h
7 6 5 4 3 2 1 0
FAST_CLK_CNT[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-124. Register 98 Field Descriptions
Bit Field Type Reset Description
7-0
FAST_CLK_CNT[7:
0]
R 0h Fast clock count value
2.3.81 Register 99h (offset = 99h) [reset = 0h]
Figure 2-122. Register 99h
7 6 5 4 3 2 1 0
FAST_CLK_CNT[15:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-125. Register 99 Field Descriptions
Bit Field Type Reset Description
7-0
FAST_CLK_CNT[1
5:8]
R 0h Fast clock count value
2.3.82 Register 9Ah (offset = 9Ah) [reset = 0h]
Figure 2-123. Register 9Ah
7 6 5 4 3 2 1 0
SLOW_CLK_CNT[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-126. Register 9A Field Descriptions
Bit Field Type Reset Description
7-0
SLOW_CLK_CNT[
7:0]
R 0h Slow clock count value. MSB bit is ignored.