ADC JESD Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.5.183 Register 109h (offset = 109h) [reset = 0h]
Figure 2-679. Register 109h
7 6 5 4 3 2 1 0
0 RX1_JESD_RAMPTEST_INCR RX1_JESD_TEST_SIG_GEN_MODE
R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-684. Register 109 Field Descriptions
Bit Field Type Reset Description
7-7 0 R/W 0h Must read or write 0
6-3
RX1_JESD_RAMP
TEST_INCR
R/W 0h
Ramp step size is
1+register_value
Default value of this reg is 0, so ramp increments by 1
2-0
RX1_JESD_TEST_
SIG_GEN_MODE
R/W 0h
Controls first 0-3 rx streams i.e. rx1 data
0 : No test
1 : short test
2 : ramp
4 : alt 0,1
2.5.184 Register 10Ah (offset = 10Ah) [reset = 0h]
Figure 2-680. Register 10Ah
7 6 5 4 3 2 1 0
0 RX2_JESD_RAMPTEST_INCR RX2_JESD_TEST_SIG_GEN_MODE
R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-685. Register 10A Field Descriptions
Bit Field Type Reset Description
7-7 0 R/W 0h Must read or write 0
6-3
RX2_JESD_RAMP
TEST_INCR
R/W 0h
Ramp step size is
1+register_value
Default value of this reg is 0, so ramp increments by 1
2-0
RX2_JESD_TEST_
SIG_GEN_MODE
R/W 0h
Controls first 4-7 streams i.e. rx2
0 : No test
1 : short test
2 : ramp
4 : alt 0,1
2.5.185 Register 10Bh (offset = 10Bh) [reset = 0h]
Figure 2-681. Register 10Bh
7 6 5 4 3 2 1 0
0 FB_JESD_RAMPTEST_INCR FB_JESD_TEST_SIG_GEN_MODE
R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset