IO Wrap Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.16.541 Register A18h (offset = A18h) [reset = 0h]
Figure 2-2804. Register A18h
7 6 5 4 3 2 1 0
SEL_INTPI_TX_GAIN_SW_3 POL_INTPI_TX
_GAIN_SW_3
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2820. Register A18 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_TX_G
AIN_SW_3
R/W 0h
select control for intpi_tx_gain_sw_3. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_TX_G
AIN_SW_3
R/W 0h
polarity control for intpi_tx_gain_sw_3. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.542 Register A19h (offset = A19h) [reset = 2h]
Figure 2-2805. Register A19h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_TX_GAIN_S
W_3
OVR_INTPI_TX
_GAIN_SW_3
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2821. Register A19 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
TX_GAIN_SW_3
R/W 1h
control to select whether the input function intpi_tx_gain_sw_3
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_TX_G
AIN_SW_3
R/W 0h override value for ovr_sel_intpi_tx_gain_sw_3 is made high
2.16.543 Register A1Ch (offset = A1Ch) [reset = 0h]
Figure 2-2806. Register A1Ch
7 6 5 4 3 2 1 0
SEL_INTPI_FB_NCOSEL_0 POL_INTPI_FB
_NCOSEL_0
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2822. Register A1C Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_FB_N
COSEL_0
R/W 0h
select control for intpi_fb_ncosel_0. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_FB_N
COSEL_0
R/W 0h
polarity control for intpi_fb_ncosel_0. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
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