Texas Instruments AFE79 Series - 2.5.25 Register 3 Fh (offset = 3 Fh) [reset = 0 h]; 2.5.26 Register 40 h (offset = 40 h) [reset = 2 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-525. Register 3E Field Descriptions
Bit Field Type Reset Description
7-7
MAPPER_SYNC_F
IFO_RX2_OFFSET
_OVR
R/W 0h
By default, the mapper mode is derived from LMFS. Use
override to change this behavior
6-3
MAPPER_SYNC_F
IFO_RX2_OFFSET
_VAL
R/W 0h The offset value to be used when ovr is 1
2-2
MAPPER_SYNC_F
IFO_RX2_MODE_
OVR
R/W 0h
By default, the mapper mode is derived from LMFS. Use
override to change this behavior
1-0
MAPPER_SYNC_F
IFO_RX2_MODE_
VAL
R/W 0h The mode to be used when ovr is 1
2.5.25 Register 3Fh (offset = 3Fh) [reset = 0h]
Figure 2-521. Register 3Fh
7 6 5 4 3 2 1 0
MAPPER_SYN
C_FIFO_FB_O
FFSET_OVR
MAPPER_SYNC_FIFO_FB_OFFSET_VAL MAPPER_SYN
C_FIFO_FB_M
ODE_OVR
MAPPER_SYNC_FIFO_FB_MO
DE_VAL
R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-526. Register 3F Field Descriptions
Bit Field Type Reset Description
7-7
MAPPER_SYNC_F
IFO_FB_OFFSET_
OVR
R/W 0h
By default, the mapper mode is derived from LMFS. Use
override to change this behavior
6-3
MAPPER_SYNC_F
IFO_FB_OFFSET_
VAL
R/W 0h The offset value to be used when ovr is 1
2-2
MAPPER_SYNC_F
IFO_FB_MODE_O
VR
R/W 0h
By default, the mapper mode is derived from LMFS. Use
override to change this behavior
1-0
MAPPER_SYNC_F
IFO_FB_MODE_V
AL
R/W 0h THe mode to be used when ovr is 1
2.5.26 Register 40h (offset = 40h) [reset = 2h]
Figure 2-522. Register 40h
7 6 5 4 3 2 1 0
0 0 0 RX1_ROOT_CLK_DIV_M
R/W-0h R/W-0h R/W-0h R/W-2h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-527. Register 40 Field Descriptions
Bit Field Type Reset Description
7-5 0 R/W 0h Must read or write 0
4-0
RX1_ROOT_CLK_
DIV_M
R/W 2h
M value of root divider.
Output of this divider goes to ddc and jesd clock dividers