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IO Wrap Register Map
1171
SBAU337–May 2020
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Serial Interface Register Maps
2.16.520 Register 9D5h (offset = 9D5h) [reset = 2h]
Figure 2-2783. Register 9D5h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_TDD_EN_R
XA
OVR_INTPI_T
DD_EN_RXA
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2799. Register 9D5 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
TDD_EN_RXA
R/W 1h
control to select whether the input function intpi_tdd_en_rxa
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_TDD_
EN_RXA
R/W 0h override value for ovr_sel_intpi_tdd_en_rxa is made high
2.16.521 Register 9D8h (offset = 9D8h) [reset = 0h]
Figure 2-2784. Register 9D8h
7 6 5 4 3 2 1 0
SEL_INTPI_TDD_EN_RXB POL_INTPI_TD
D_EN_RXB
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2800. Register 9D8 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_TDD_
EN_RXB
R/W 0h
select control for intpi_tdd_en_rxb. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_TDD_
EN_RXB
R/W 0h
polarity control for intpi_tdd_en_rxb. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
2.16.522 Register 9D9h (offset = 9D9h) [reset = 2h]
Figure 2-2785. Register 9D9h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_TDD_EN_R
XB
OVR_INTPI_T
DD_EN_RXB
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2801. Register 9D9 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
TDD_EN_RXB
R/W 1h
control to select whether the input function intpi_tdd_en_rxb
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_TDD_
EN_RXB
R/W 0h override value for ovr_sel_intpi_tdd_en_rxb is made high
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