Texas Instruments AFE79 Series - 2.14.296 Register 5 ECh (offset = 5 ECh) [reset = 0 h]; 2.14.297 Register 634 h (offset = 634 h) [reset = 0 h]; 2.14.298 Register 635 h (offset = 635 h) [reset = 3 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.14.296 Register 5ECh (offset = 5ECh) [reset = 0h]
Figure 2-2179. Register 5ECh
7 6 5 4 3 2 1 0
FB_AGC_CUR
R_EXT_LNA_E
N
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2193. Register 5EC Field Descriptions
Bit Field Type Reset Description
0-0
FB_AGC_CURR_E
XT_LNA_EN
R 0h
Current external LNA enable
0 : Ext LNA is bypassed
1 : Ext LNA is enabled
2.14.297 Register 634h (offset = 634h) [reset = 0h]
Figure 2-2180. Register 634h
7 6 5 4 3 2 1 0
FB_ALC_CLK_
EN
FB_ALC_ENAB
LE
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2194. Register 634 Field Descriptions
Bit Field Type Reset Description
1-1 FB_ALC_CLK_EN R/W 0h
clock enable for ALC module. Need to be set along with
enable_alc
0 : Disable
1 : Enable
0-0 FB_ALC_ENABLE R/W 0h
Digital Gain Compensation enabled. Can be enabled
irrespective of whether Internal AGC is enabled/disabled
0 : disable
1 : enable
2.14.298 Register 635h (offset = 635h) [reset = 3h]
Figure 2-2181. Register 635h
7 6 5 4 3 2 1 0
FB_ALC_MODE
R/W-3h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset