Texas Instruments AFE79 Series - 2.15.23 Register 9 Dh (offset = 9 Dh) [reset = 0 h]; 2.15.24 Register 9 Eh (offset = 9 Eh) [reset = 0 h]; 2.15.25 Register 9 Fh (offset = 9 Fh) [reset = 0 h]; 2.15.26 Register A0 h (offset = A0 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.15.23 Register 9Dh (offset = 9Dh) [reset = 0h]
Figure 2-2230. Register 9Dh
7 6 5 4 3 2 1 0
ENABLE_TXNCOSEL_B
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2245. Register 9D Field Descriptions
Bit Field Type Reset Description
5-0
ENABLE_TXNCOS
EL_B
R/W 0h
If enable == 0 then the corresponding bit in txncosel for that
channel is made 0, else ncosel is sent as it is
2.15.24 Register 9Eh (offset = 9Eh) [reset = 0h]
Figure 2-2231. Register 9Eh
7 6 5 4 3 2 1 0
ENABLE_TXNCOSEL_C
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2246. Register 9E Field Descriptions
Bit Field Type Reset Description
5-0
ENABLE_TXNCOS
EL_C
R/W 0h
If enable == 0 then the corresponding bit in txncosel for that
channel is made 0, else ncosel is sent as it is
2.15.25 Register 9Fh (offset = 9Fh) [reset = 0h]
Figure 2-2232. Register 9Fh
7 6 5 4 3 2 1 0
ENABLE_TXNCOSEL_D
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2247. Register 9F Field Descriptions
Bit Field Type Reset Description
5-0
ENABLE_TXNCOS
EL_D
R/W 0h
If enable == 0 then the corresponding bit in txncosel for that
channel is made 0, else ncosel is sent as it is
2.15.26 Register A0h (offset = A0h) [reset = 0h]
Figure 2-2233. Register A0h
7 6 5 4 3 2 1 0
USE_PER_CH
_RXAB_TDD
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset