DAC JESD Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-354. Register 98 Field Descriptions
Bit Field Type Reset Description
7-4
LINK1_SYSREF_C
NT_ON_RELEASE
_OPPORTUNITY
R 0h
For JESDB
Step-1 First run the simulation with some link0_rbd_m1
register programmed
Step-2 Read the lane0_f_counter_all_lanes_ready status
register
Step-3 Program the link0_rbd_m1 registers with the
'modulo((lane0_f_counter_all_lanes_ready ' + 2), F*K/4) and
run the simulation
Step-4 Now read the '
link0_sysref_cnt_on_release_opportunity' status register
Step-5 Again Program the link0_rbd_m1 registers with the
link0_rbd_m1 from Step-3 as modulo(('link0_rbd_m1 from
Step-3' + link0_sysref_cnt_on_release_opportunity), F*K/4)
and run the simulation
Step-6 Now if you read back the register '
link0_sysref_cnt_on_release_opportunity', it should read back
as 0
For JESDC
Step-1 First run the simulation with some link0_rbd_m1
register programmed
Step-2 Read the lane0_f_counter_all_lanes_ready status
register
Step-3 Program the link0_rbd_m1 registers with the
'modulo((lane0_f_counter_all_lanes_ready ' + 2), 64*K) and
run the simulation
Step-4 Now read the '
link0_sysref_cnt_on_release_opportunity' status register
Step-5 Again Program the link0_rbd_m1 registers with the
link0_rbd_m1 from Step-3 as modulo(('link0_rbd_m1 from
Step-3' + link0_sysref_cnt_on_release_opportunity), 64*K) and
run the simulation
Step-6 Now if you read back the register '
link0_sysref_cnt_on_release_opportunity', it should read back
as 0
Note: Refer to TI App Note for detail on RBD optimization.
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