Texas Instruments AFE79 Series - Page 110

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110
SBAU337–May 2020
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Macro
Table 1-58. (continued)
Macro AGC Digital Detector Configuration Macro
1 0x00 1 RX Channel Select Bit 0: 1 → Value
specified in
subsequent
operands is valid for
1RX.
Bit 1: 1 → Value
specified in
subsequent
operands is valid for
2RX.
Bit 2: 1 → Value
specified in
subsequent
operands is valid for
3RX.
Bit 3: 1 → Value
specified in
subsequent
operands is valid for
4RX.
Bit 4 → RESERVED
Bit 5 → RESERVED
2 0x01 1 Detector Enable Digital Detector
Enable Field
Bit 0: Big step
attack detector
enable
Bit 1: Small step
attack detector
enable
Bit 2: Big step
decay detector
enable
Bit 3: Small step
decay detector
enable
Bit 4: Power attack
detector enable
Bit 5: Power decay
detector enable
In all cases, 0 ->
Disable, 1-> Enable
3 0x02 1 Detector Threshold Big Step Attack
Threshold with
resolution of –0.25
dB
4 0x03 1 Detector Threshold Small Step Attack
Threshold with
resolution of –0.25
dB
5 0x04 1 Detector Threshold Big Step Decay
Threshold with
resolution of –0.25
dB
6 0x05 1 Detector Threshold Small Step Decay
Threshold with
resolution of –0.25
dB
7 0x06 1 Detector Threshold Power Detector
Attack Threshold
with resolution of
–0.25 dB
8 0x07 1 Detector Threshold Power Detector
Decay Threshold
with resolution of
–0.25 dB