Addr OPERAND_BA
Addr STATUS_BA
Addr OPCODE_BA
Operand
Trigger
Addr
OPERAND_BA
Burst Mode ++
Operand 0 Operand 1 Operand 2 Operand 3
Address
OPCODE_BA
Opcode
Address = OPCODE_BA
Address = OPERAND_BA
Op 2 Op 1 Op 0
Op 3
Base address of Status Registers
Base address of Opcode
Base address of Operand
Legend
Macro Opcode Variable Length Macro Operand
Macro Memory
Macro Control Register
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Design Details
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SBAU337–May 2020
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Macro
Figure 1-2. Macro Interface data memory and control register
The Macro Opcode register (Trigger), operand registers and the Macro Memory is available on SPI write
and read path. Thus to initiate the Macro a series of SPI registers need to be written. Eg:
1. Select Customer Macro Interface page in SPI page select register
2. Write Macro operands <SPI streaming mode recommended>
3. Write Macro opcode in trigger register
Figure 1-3. SPI write sequence for initiating Macro
Figure 1-4shows a simplified transaction diagram.
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