SERDES Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-720. Serdes Register Map (continued)
ADDRESS (Hex) D7 D6 D5 D4 D3 D2 D1 D0
4086h
OWEN_THETA2
_ACC
OW_THETA2_ACC
4087h
OWEN_PHASE1
_ACC
OW_PHASE1_ACC
4088h
OWEN_THETA4
_ACC
OW_THETA4_ACC
4089h
OWEN_THETA3
_ACC
OW_THETA3_ACC
408Eh AGC_SETTING1[3:0] AGC_SETTING2_MSB
408Fh AGC_SETTING0 AGC_SETTING1[5:4]
4090h AGC_SETTING4 AGC_SETTING5_MSB
4091h AGC_SETTING2_LSB AGC_SETTING3
4092h AGC_SETTING6[1:0] AGC_SETTING7
4093h AGC_SETTING5_LSB AGC_SETTING6[5:2]
4094h
RX_SPEED_SE
L[0]
EDGE_THRESH
4095h
PHASE_WANDE
R_LEVEL_SEL
TOP_ROTATOR
_EN
RX_SPEED_SEL[2:1]
4096h EDGE3[1:0] EDGE2 EDGE1
4097h
PH_WAND_CLK
_EN
EDGE4 EDGE3[2]
4098h READ_PRBS_ERR_HIGH[7:0]
4099h READ_PRBS_ERR_HIGH[15:8]
409Ah READ_PRBS_ERR_LOW[7:0]
409Bh READ_PRBS_ERR_LOW[15:8]
409Dh LINK_STATUS
40A0h READ_THETA2
40A1h READ_PHASE
40A2h READ_THETA4
40A3h READ_THETA3
40A4h READ_MRGN_CNTR[7:0]
40A5h READ_MRGN_CNTR[11:8]
40AAh READ_PHASE_WANDER[7:0]
40ABh READ_PHASE_WANDER[14:8]
40ACh READ_RX_FREQ_ERROR[7:0]
40ADh READ_RX_FREQ_ERROR[10:8]
4140h
TX_SPEED_SEL
TX_POLARITY_
FLIP
4141h
TX_TEST_DATA
_SOURCE
TX_PRBS_CLO
CK_EN
TX_TEST_EN
LOOPBACK_CL
OCK_INV
TX_PRBS_GEN
_EN
TX_PRBS_GEN
_ERR
TX_PRBS_MODE
4142h TX_TEST_PATTERN_HIGH[7:0]
4143h TX_TEST_PATTERN_HIGH[15:8]
4144h TX_TEST_PATTERN_LOW[7:0]
4145h TX_TEST_PATTERN_LOW[15:8]
41E8h
VTSTGRPU_TX[2:0]
ENTSTPGROUP
_TX
TESTMODE_TX
41E9h
VTSTGRPU_TX[
3]
41EAh
VDRV_VDDR2[0
]
VDRV_VDDR3
41EBh PU_TX_LANE VDRV_VDDR1 VDRV_VDDR2[2:1]
41ECh MAIN_CURSOR
41EDh POST_CURSOR PRE_CURSOR
41EEh
TESTMODE_RX
[0]
VTSTGRPU_RX
ENTSTPGROUP
_RX
41EFh TESTMODE_RX[2:1]
41F0h RX_CTLE_BIAS0
41F6h
RX_CLOCKING_BIAS[4:0]
PU_RX_ADC_L
ANE
41F7h VREF1P3VCODIV VREFVCODIV RX_CLOCKING_BIAS[6:5]
41FAh VREF_DELAY_DAC_TOP VREF_DELAY_DAC_BOT
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