ADSP-214xx SHARC Processor Hardware Reference A-231
Registers Reference
additional registers,
DPI_IMASK_RE and DPI_IMASK_FE that are used for
interrupt latching.
All of the DPI interrupt registers are used primarily to provide the status
of the interrupt controller. These registers are shown in Figure A-131 and
listed in Table A-121. Note that for each of these registers the bit names
and numbers are the same.
Peripherals Routed Through the DPI
The following sections provide information on the peripherals that are
explicitly routed through the digital peripheral interface.
Figure A-131. DPI Interrupt Latch/Mask Register
Table A-121. DPI Interrupt Registers
Register Description
DPI_IRPTL (ROC) Interrupt Latch Register
DPI_IRPTL_SH (RO) DPI_IMASK Shadow Register. Reads of this register returns
data in DPI_IMASK without clearing contents of the register.
DPI_IMASK_RE (RW) Rising Edge Interrupt Mask Register
DPI_IMASK_FE (RW) Falling Edge Interrupt Mask Register
DPI_13_INT
DPI_12_INT
DPI_11_INT
DPI_10_INT
DPI_08_INT
UART0_TX_INT
UART0_RX_INT
DPI_06_INT
TWI_INT
DPI_05_INT
DPI_07_INT
DPI_09_INT
09 837564 2114 12 11 101315
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