ADSP-214xx SHARC Processor Hardware Reference 11-5
Input Data Port
SRU Programming
The SRU (signal routing unit) needs to be programmed in order to con-
nect the IDP to the output pins as shown in Table 11-5.
Table 11-6 shows the signal connections when using the PDAP on the
DAI pins.
Register Overview
This section provides brief descriptions of the major registers. For com-
plete information see “Input Data Port Registers” on page A-174.
Table 11-5. IDP DAI/SRU Signal Connections
Internal Node DAI Group SRU Register
Inputs
IDP7–0_CLK_I Group A SRU_CLK3–2
IDP7–0_FS_I Group C SRU_FS3–2
IDP7–0_DAT_I Group B SRU_DAT5–4
Table 11-6. PDAP DAI/SRU Signal Connections
Internal Node DAI Connection SRU Register
Inputs
IDP0_CLK_I Group A SRU_CLK2
PDAP_HOLD_I Group C SRU_FS2
DAI_PB20–1_I Group D SRU_PIN4–0
Outputs
PDAP_STRB_O Group D
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