ADSP-214xx SHARC Processor Hardware Reference 11-1
11 INPUT DATA PORT
The Input Data Port (IDP) compromises two units: the serial input port
(SIP) and the parallel data acquisition port (PDAP). Located inside the
DAI of the SHARC processor it provides an efficient way of transferring
data from DAI pin buffers, the external port, the asynchronous sample
rate converters (ASRC) and the S/PDIF transceiver to the internal mem-
ory of SHARC. The IDP specifications are shown in Table 11-1.
Table 11-1. IDP Port Specifications
Feature SIP PDAP
Connectivity
Multiplexed Pinout No Yes (External Port)
SRU DAI Required Yes Yes
SRU DAI Default Routing No No
SRU2 DPI Required No No
SRU2 DPI Default Routing N/A N/A
Interrupt Control Yes Yes
Protocol
Master Capable No No
Slave Capable Yes Yes
Transmission Simplex Yes Yes
Transmission Half Duplex No No
Transmission Full Duplex No No
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