ADSP-214xx SHARC Processor Hardware Reference 10-15
Serial Ports
The SPORTx_DA or SPORTx_DB signal is always driven if the serial
port is enabled as transmitter (SPEN_A or SPEN_B = 1 in the SPCTLx
control register), unless it is in multichannel mode and an inactive
time slot occurs.
When the SPORT is configured as a transmitter (SPTRAN = 1), the TXSPxA
and TXSPxB buffers, and the channel transmit shift registers respond to
SPORTx_CLK and SPORTx_FS to transmit data. The receive RXSPxA and
RXSPxB buffers, and the receive shift registers are inactive and do not
respond to SPORTx_CLK and SPORTx_FS signals. Since these registers are
inactive, reading from an empty buffer causes the core to hang
indefinitely.
When the SPORT is configured as a transmitter (SPTRAN = 1), the trans-
mit buffers are activated. The transmit buffers act like a two-location
FIFO because they have one data registers plus an output shift register.
Receive Path
If the serial data signal is configured as a serial receiver (SPTRAN = 0), the
receive portion of the SPORT shifts in data from the SPORTx_DA or
SPORTx_DB signal, synchronous to the SPORTx_CLK receive clock. If framing
signals are used, the SPORTx_FS signal indicates the beginning of the serial
word being received. When an entire word is shifted in on the primary A
channel, the data is (optionally) expanded (SPORT1, 3, 5 and 7 only),
then automatically transferred to the
RXSPxA buffer. When an entire word
is shifted in on the secondary channel, it is automatically transferred to the
RXSPxB buffer.
When the SPORT is configured as a receiver (SPTRAN = 0), the RXSPxA and
RXSPxB buffers, and the channel receive shift registers respond to
SPORTx_CLK and SPORTx_FS for reception of data. The transmit TXSPxA and
TXSPxB buffer registers and transmit A and B shift registers are inactive and
do not respond to the
SPORTx_CLK and SPORTx_FS. Since the TXSPxA and
TXSPxB buffers are inactive, writing to a transmit data buffer causes the
core to hang indefinitely.
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