ADSP-214xx SHARC Processor Hardware Reference 9-31
Digital Application/Digital Peripheral Interfaces
DPI Default Routing
When the processor comes out of reset, some default routing is established
(Figure 9-15). This scheme allows systems to use the SPI as either master
or slave (without changing the routing scheme). Programs only need to
use the SPI control register settings to configure master or slave operation.
Figure 9-15. DPI Default Routing
PBEN_O
SPI_CLK_I
SPI_CLK_O
PBEN_O
DPI
Pin03
SPIDS_I
DPI
Pin04
SPI_MOSI_I
SPI_MOSI_O
PBEN_O
DPI
Pin01
SPI_MISO_I
SPI_MISO_O
PBEN_O
DPI
Pin02
SPI_FLG0_O
PBEN_O
DPI
Pin05
SPI_FLG1_O
PBEN_O
DPI
Pin06
SPI_FLG2_O
PBEN_O
DPI
Pin07
SPI_FLG3_O
PBEN_O
DPI
Pin08
UART0TX_O
PBEN_O
DPI
Pin09
UART0RX_I
DPI
Pin10
TWI_DATA_I
PBEN_O
DPI
Pin11
TWI_CLK_I
PBEN_O
DPI
Pin12
TIMER0_O
DPI
Pin13
TIMER1_O
PBEN_O
DPI
Pin14
low
low
low
low
low
low
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