ADSP-214xx SHARC Processor Hardware Reference 1-3
Introduction
I/O Peripherals
These peripherals are coupled with the external port and therefore inde-
pendent from the routing units.
• Asynchronous Memory Interface (AMI)
• SDRAM controller (ADSP-2147x, ADSP-2148x)
• DDR2 controller (ADSP-2146x)
• 4 PWM modules
I/O Processor
The input/output processor (IOP) manages the off-chip data I/O to free
the core from this burden. Up to 67 channels of DMA are available on the
processors. For model specific information, see the product specific data
sheet. The I/O processor can perform DMA transfers between the periph-
erals and internal memory at the full core clock speed. The architecture of
the internal memory allows the IOP and the core to access internal mem-
ory simultaneously with no reduction in throughput.
Digital Audio Interface (DAI)
The digital audio interface (DAI) unit consists of an interrupt controller, a
signal routing unit, and many peripherals:
• 8 serial ports (SPORT)
• Input Data Port (IDP)
• 4 precision clock generators (PCG)
• Some family members have an S/PDIF receiver/transmitter
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