ADSP-214xx SHARC Processor Hardware Reference 3-121
External Port
Write Effect Latency
For details on write effect latency, see the SHARC Processor Programming
Reference.
Programming Models
The following sections provide information on the various programming
models that are used through the external port interface.
External Port
The section describes software programming steps required for the suc-
cessful operation of the external port.
DMA
The following sections describe the programming steps for different types
of DMA transfers.
Standard DMA
Use the following procedure to set up and run a standard DMA on the
external port.
1. Configure the
AMICTLx registers to enable the AMI and to set the
desired wait states, data bus width, and so on. Configure the SDCTL
registers to enable SDRAM/DDR2, and to set the desired clock
and timing settings, the data bus width, and other parameters.
2. Initialize the IIEP, IMEP, ICEP, EIEP, and EMEP registers.
3. If circular buffering is desired, use the corresponding TCB storage.
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