ADSP-214xx SHARC Processor Hardware Reference 6-11
FFT/FIR/IIR Hardware Modules
Operating Modes
The following sections describe FFT processing types and methods.
Small FFT Computation (<= 256 Points)
A small FFT (NOVER256 = zero) can be handled completely in one step
since the twiddles and input data stream fit in the local memories for
twiddles and data. In this way two input TCBs (twiddles and data) are fed
into the accelerator. After performing the FFT the output TCB writes the
results back into the internal memory and the next FFT can start.
Large FFT Computation (>= 512 Points)
For large FFTs (NOVER256 = non zero) the model looks different since the
twiddle/data do not fit completely into the local memories. The FFT com-
putation is matrix based on rows (horizontal) and columns (vertical) and
performed in three steps:
x(0) x(1) x(2) . . . . x(H - 1) x(H) x(H + 1) x (H + 2) . . .
x(2H - 1) x(2H) x(2H + 1) x(2H + 2) . . . . x(3H - 1) | | | . . |
x((V - 1)H) x((V - 1)H + 1) x((V - 1)H + 2) . . . . x(VH - 1)
1. The vertical (column) V Point FFTs are performed on the matrix.
2. The output of step 1 is multiplied by special twiddles (special
coefficients):
3. Horizontal (row) H Point FFTs are performed on the output
matrix of Step 2. This produces the final FFT on vertical columns
(column wise).
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