Manual Contents
lxii ADSP-214xx SHARC Processor Hardware Reference
Manual Contents
This manual provides detailed information about the ADSP-214xx pro-
cessors in the following chapters:
• Chapter 1, “Introduction”
Provides an architectural overview of the SHARC processors.
• Chapter 2, “I/O Processor”
Describes input/output processor architecture, and provides direct
memory access (DMA) procedures for the processor peripherals.
• Chapter 3, “External Port”
Describes how the processor’s connect to external memories. These
include DDR2 (ADSP-2146x) and SDRAM (ADSP-2147x,
ADSP-2148x).
• Chapter 4, “Link Ports—ADSP-2146x”
Describes the two bidirectional 8-bit wide link ports, which can
connect to other processor or peripheral link ports.
• Chapter 5, “Memory-to-Memory Port DMA”
Describes memory-to-memory DMA.
• Chapter 6 “FFT/FIR/IIR Hardware Modules”
Describes the dedicated hardware accelerators used to reduce the
instruction load on the core, freeing it up for other tasks, effec-
tively adding more bandwidth.
• Chapter 7, “Pulse Width Modulation”
Describes the implementation and use of the pulse width modula-
tion module which provides a technique for controlling analog
circuits with the microprocessor’s digital outputs.
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