ADSP-214xx SHARC Processor Hardware Reference A-1
A REGISTERS REFERENCE
The SHARC processors have general-purpose and dedicated registers in
each of their functional blocks. The register reference information for each
functional block includes bit definitions, initialization values, and mem-
ory-mapped addresses (for I/O processor registers). Note that this
appendix only contains information for the control and or status registers.
All other IOP registers (for example address, modify, count) are described
in Chapter 2, I/O Processor.
• “Overview” on page A-2
• “System and Power Management Registers” on page A-4
• “ADSP-2146x External Port Registers” on page A-18
• “DAI Signal Routing Unit Registers” on page A-118
• “Peripherals Routed Through the DAI” on page A-150
• “DPI Signal Routing Unit Registers” on page A-218
• “Peripherals Routed Through the DPI” on page A-231
• “Register Listing” on page A-273
When writing programs, it is often necessary to set, clear, or test bits in
the processor’s registers. While these bit operations can all be done by
referring to the bit’s location within a register or (for some operations) the
register’s address with a hexadecimal number, it is much easier to use sym-
bols that correspond to the bit’s or register’s name. For convenience and
consistency, Analog Devices supplies a header file that provides these bit
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