ADSP-214xx SHARC Processor Hardware Reference 1-5
Introduction
Signal Routing Unit 2
Conceptually similar to a “patch-bay” or multiplexer, the SRU2 provides a
group of registers that define the interconnection of the DPI peripherals
to the DPI pins or to other DPI peripherals.
Development Tools
The processors are supported by VisualDSP++, an easy to use Integrated
Development and Debugging Environment (IDDE). VisualDSP++ allows
you to manage projects from start to finish from within a single, inte-
grated interface. Because the project development and debug
environments are integrated, you can move easily between editing, build-
ing, and debugging activities.
Differences from Previous Processors
This section identifies differences between the ADSP-214xx processors
and previous SHARC processors: ADSP-21161, ADSP-21160,
ADSP-21060, ADSP-21061, ADSP-21062, and ADSP-21065L. Like the
ADSP-2116x family, the ADSP-214xx SHARC processor family is based
on the original ADSP-2106x SHARC family. The ADSP-214xx processors
preserve much of the ADSP-2106x architecture and is code compatible to
the ADSP-21160, while extending performance and functionality. For
background information on SHARC processors and the ADSP-2106x
family DSPs, see the ADSP-2106x SHARC User’s Manual or the
ADSP-21065L SHARC DSP Technical Reference.
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