Programming Model
20-24 ADSP-214xx SHARC Processor Hardware Reference
Programming Model for Core Transfers
The following is the general procedure for transferring data using the core.
1. Clear the UARTTXCTL/UARTRXCTL registers to zero.
2. Configure the UARTLCR, UARTDLL, UARTDLH, UARTSCR and
UARTMODE registers.
3. Program the
UARTIER registers to generate interrupt when the trans-
mit buffer is empty and / or the receive buffer is full.
4. Program the PICR registers to map the UART interrupt directly or
Configure the DPI_IRPTL register to enable the UART interrupts.
5. Enable the UART by setting the UARTEN bit in the
UARTTXCTL/UARTRXCTL registers.
6. Inside the ISR, check for the interrupt triggered and write to the
transmit buffer in case of transmit buffer empty and read from the
receive buffer in case of receive buffer fill event.
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