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Analog Devices SHARC ADSP-214 Series - Circular Buffer DMA

Analog Devices SHARC ADSP-214 Series
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ADSP-214xx SHARC Processor Hardware Reference 8-13
Media Local Bus
Circular Buffer DMA
Logical channels operate in circular buffer DMA mode when the channel
mode select bits in the
MLB_CECRx register are set to 01. This mode is
available for synchronous channels only. In contrast to ping-pong buffer-
ing, circular buffering uses a single, circular memory buffer to process
channel data.
For circular buffer mode, synchronous data is handled in the following
manner:
Before buffer processing can begin, the BSA bits in the MLB_CNBCRx
register and the BEA bits in the MLB_CNBCRx register should be pro-
grammed with the beginning and the ending address of the circular
buffer. Set the RDY bit in the MLB_CSCRx register to initiate buffer
processing.
At the start of buffer processing, the beginning address of the circu-
lar buffer (BSA) is loaded into BCA field of the MLB_CCBCRx register.
Additionally, the ending address of the circular buffer (BEA bits) is
loaded into the BFA bit field of the MLB_CCBCRx register.
During the processing of the circular buffer, the BCA bits are
updated to indicate which quadlet of the synchronous data is cur-
rently being processed.
Once the end of the buffer is reached and
BCA = BFA, the BCA field is
reloaded to point to the beginning address of the circular buffer
(
BSA).
Unlike in ping-pong DMA, the RDY bit remains set during the processing
of the circular buffer DMA. Software must clear this bit to halt buffer pro-
cessing. For more information, see “Programming Model” on page 8-16.
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