FIR Accelerator
6-52 ADSP-214xx SHARC Processor Hardware Reference
Debug Mode
The next sections show the steps required for reading and writing local
memory in debug mode.
Write to Local Memory
1. Enable the FIR module using the PMCTL1 register.
2. Wait at least 4 CCLK cycles.
3. Clear the FIR_DMAEN bit in the FIRCTL1 register.
4. Set FIR_DBGMODE, FIR_DBGMEM and FIR_HLD bits in FIRDEBUGCTL
register.
5. Set the FIR_ADRINC bit in FIRDEBUGCTL register for address auto
increment.
6. Write start address to the FIRDBGADDR register. Note if bit 11 is set,
coefficient memory is selected.
7. Wait at least 4 CCLK cycles.
8. Write data to the FIRDBGWRDATA register.
Read from Local Memory
1. Enable FIR module using the PMCTL1 register.
2. Wait at least 4
CCLK cycles.
3. Clear the FIR_DMAEN bit in the FIRCTL1 register.
4. Set
FIR_DBGMODE, FIR_DBGMEM and FIR_HLD bits in FIRDEBUGCTL
register.
5. Set the
FIR_ADRINC bit in FIRDEBUGCTL register for address auto
increment.