Functional Description
9-20 ADSP-214xx SHARC Processor Hardware Reference
Rules for SRU Connections
There are two rules which apply to all routing:
1. Each input must connect to exactly one output
2. An output can feed any number of inputs
As an example from Figure 9-9:
•
DAI_PB01_O is routed to SPORT5_CLK_I
• DAI_PB01_O is routed to SPORT4_CLK_I
• SPORT4_CLK_O is routed to SPORT3_CLK_I
Inputs may only be connected to outputs.
Making SRU Connections
In this section, three types of SRU routing are demonstrated.
1. Listing 9-1 and Figure 9-10 show the SRU connection between the
DAI and pin buffers.
2. Listing 9-2 on page 9-22 and Figure 9-11 on page 9-22 show the
SRU connection between the DAI pin buffers and SPORTs.
3. Listing 9-3 on page 9-23 and Figure 9-12 on page 9-23 show SRU
connection from the SPORT/PCG to the MISC/DAI pin buffers.
These examples use a macro which is provided by the VisualDSP
tools. Also see “Programming Model” on page 9-42.
Listing 9-1. SRU Connection Between DAI Pin Buffers
SRU(HIGH, PBEN03_I); // DAI pin 3 output
nop;
SRU(LOW, PBEN14_I); // DAI pin 14 input
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