Analog Devices SHARC ADSP-214 Series

Data Transfer
3-92 ADSP-214xx SHARC Processor Hardware Reference
8-Bit Instruction Storage and Packing
In Table 3-20, the logical to physical translation is a multiplication by a
factor of 6 and N = 0xAAAA9. Therefore, the 8-bit wide AMI supports
0.7 million instructions.
Table 3-20. Logical Versus Physical Address Mapping,
8-Bit AMI
Logical ISA Normal Word
Address, Program Sequencer
Physical Address, External Bus Data7–0
0x20 0000 0xC0 0000 Instr0[7:0]
0xC0 0001 Instr0[15:8]
0xC0 0002 Instr0[23:16]
0xC0 0003 Instr0[31:24]
0xC0 0004 Instr0[39:32]
0xC0 0005 Instr0[47:40]
0x20 0001 0xC0 0006 Instr1[7:0]
0xC0 0007 Instr1[15:8]
0xC0 0008 Instr1[23:16]
0xC0 0009 Instr1[31:24]
0xC0 000A Instr1[39:32]
0xC0 000B Instr1[47:40]
... ...
0x2A AAA9 0xFF FFFC InstrN[23:16]
0xFF FFFD InstrN[31:24]
0xFF FFFE InstrN[39:32]
0xFF FFFF InstrN[47:40]
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