ADSP-214xx SHARC Processor Hardware Reference 7-5
Pulse Width Modulation
SRU Programming
The ADSP-2147x and 2148x can output the PWM units 3–1 over the
DPI pins. The PWMONDPIEN bit (bit 30 in the SYSCTL register) enables the
routing output logic for the DPI group B register.
Register Overview
This section provides brief descriptions of the major registers. For com-
plete register information, see Appendix A, Registers Reference.
• PWM global control register (PWMGCTL). Enables or disables
the four PWM groups simultaneously in any combination for syn-
chronization between the PWM groups.
• PWM global status register (PWMGSTAT). Provides the status of
each PWM group.
• PWM control registers (PWMCTLx). Used to set the operating
modes of each PWM block. This register also allows programs to
disable interrupts from individual groups.
PWM2 AMI_ADDR16 = AL2
AMI_ADDR17 = AH2
AMI_ADDR18 = BL2
AMI_ADDR19 = BH2
PWM3 AMI_ADDR20 = AL3
AMI_ADDR21 = AH3
AMI_ADDR22 = BL3
AMI_ADDR23 = BH3
Table 7-3. PWM Connections (Cont’d)
PWM Unit Pin Multiplexing
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