ADSP-214xx SHARC Processor Hardware Reference 14-1
14 PRECISION CLOCK
GENERATOR
The precision clock generators (PCG) consist of four units, each of which
generates a pair of signals (clock and frame sync) derived from a clock
input signal. The units, A B, C, and D, are identical in functionality and
operate independently of each other. The two signals generated by each
unit are normally used as a serial bit clock/frame sync pair. Table 14-1
lists the PCG specifications.
Table 14-1. PCG Specifications
Feature PCGA–B PCGC–D
Connectivity
Multiplexed Pinout No No
SRU DAI Required Yes Yes
SRU DAI Default Routing No No
SRU2 DPI Required No Yes
SRU2 DPI Default Routing No No
Interrupt Control No No
Protocol
Master Capable Yes Yes
Slave Capable No No
Transmission Simplex N/A N/A
Transmission Half Duplex N/A N/A
Transmission Full Duplex N/A N/A
To Next Page
Loading...
