ADSP-214xx SHARC Processor Hardware Reference A-273
Registers Reference
Register Listing
This section list all available memory mapped IOP registers including the
address and reset values.
Register Mnemonic Address Description Reset
Power Management Register
PMCTL 0x2000 Power Management Control Hardware
dependent
PMCTL1 0x2001 Power Management Control 1 0
Miscellaneous Registers
RUNRSTCTL 0x2100 Running Reset Control 0x0
ROMID 0x20FF ROM Identification Hardware
dependent
Asynchronous Memory Interface Registers
EPCTL 0x1801 External Port Global Control 0xF0
AMICTL0 0x1804 AMI Control Register for Bank 1 0x0
AMICTL1 0x1805 AMI Control Register for Bank 2 0x0
AMICTL2 0x1806 AMI Control Register for Bank 3 0x0
AMICTL3 0x1807 AMI Control Register for Bank 4 0x0
AMISTAT 0x180A AMI Status 0x1
DMA Address Registers
DMAC0 0x180B External Port DMA CH 0 Control 0x0
EIEP0 0x1820 External Port CH 0 DMA External Index Address 0x0
EMEP0 0x1821 External Port CH 0 DMA External Modifier 0x0
ECEP0 0x1822 External Port CH 0 DMA External Count 0x0
IIEP0 0x1823 External Port CH 0 DMA Internal Index Address 0x0
IMEP0 0x1824 External Port CH 0 DMA Internal Modifier 0x0
ICEP0 0x1825 External Port CH 0 DMA Internal Count 0x0
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