ADSP-214xx SHARC Processor Hardware Reference lxv
Preface
• Chapter 23, “Power Management”
Describes system design features as they relate to power
management.
• Appendix A, “Registers Reference”
Provides a graphical presentation of all registers and describes the
bit usage in each register.
• Appendix B “Peripheral Interrupt Control”
Provides a complete listing of the registers that are used to config-
ure and control interrupts.
• Appendix C “Audio Frame Formats”
Provides descriptions on the standard audio formats used by many
of the peripherals.
This hardware reference is a companion document to the SHARC
Processor Programming Reference.
What’s New in This Manual
This is the third general release of the preliminary edition (Revision 0.3)
of the this manual. This manual has been retitled from ADSP-2146x
SHARC Processor Hardware Reference to ADSP-214xx SHARC Processor
Hardware Reference. This change is due to the addition of two new prod-
uct families—the ADSP-2147x and ADSP-2148x SHARC processors.
The ADSP-2147x and ADSP-2148x SHARC processors contain addi-
tional features. These features are listed in each product’s respective data
sheet.
To Next Page
Loading...
Need help?
General
