Peripheral Registers
A-94 ADSP-214xx SHARC Processor Hardware Reference
Media Local Bus Registers
The registers in this section are used to program and get status informa-
tion for the MLB interface and the specific channels used.
MLB Global Registers
This section lists all different control and status registers related to the
MLB controller.
Device Control Configuration Register (MLB_DCCR)
This register, shown in Figure A-45 and described in Table A-57, controls
the device enable/disable, clock rate, lock status and addressing.
5 IIR_ADRINC Address Auto Increment. If this bit is set, the address register
auto increments on IIRDBGWRDATA_H/
IIRDBGWRDATA_L writes and IIRDBGRDDATA_H/
IIRDBGRDDATA_L reads.
31–6 Reserved
Figure A-45. MLB_DCCR Register
Table A-56. IIRDEBUGCTL Register Bit Descriptions (RW) (Cont’d)
Bits Name Description
MRS
MLB Hardware Reset Enable
MHRE
MLE
MLB Little-Endian Mode
MLB 5-pin Select
M5PS
MLB Software Reset
MDA (7–0)
MLB Device Address
LBM
Loopback Mode Enable
MDE
MLB Enable
MLK
MLB Lock
MLB Clock Select
MCS (29–28)
31 302928 27 26 25 24 23 22 21 20 19 18 17 16
09 837564 2114 12 11 101315
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