ADSP-214xx SHARC Processor Hardware Reference A-95
Registers Reference
Table A-57. MLB_DCCR Register Bit Descriptions (RW)
Bit Name Description
7–0 MDA MLB Device Address. Determines the unique device address (DA) for
ADSP-214xx MediaLB device. MLB device address is 16 bits. Bits 15–
9 and LSB are always zero. Only bits 8–1 vary and they are defined by
MLB_DCCR bits 7–0. Device addresses are used by the system chan-
nel MLBSCAN command.
MDA Device Address
00000001 0000 000'0 0000 001'0 = 0x0002
00000010 0000 000'0 0000 010'0 = 0x0004
00000011 0000 000'0 0000 100'0 = 0x0006
----
11111110 0000 000'1 1111 110'0 = 0x01FC
For further information on assigning the device address, refer to the
MLB specification.
22–8 Reserved
23 (WO) MRS MLB Software Reset. When set, resets the MLB physical and link
layer logic. Hardware clears this bit automatically.
24 MHRE MLB Hardware Reset Enable.
Enables hardware to automatically reset the MLB physical and link
layer logic upon the reception MLB reset system command.
0 = Hardware reset option disabled
1 = MLB reset causes hardware reset
25 MLE MLB Little-Endian Mode.
0 = Big-Endian mode
1 = Little-Endian mode
26 MLK MLB Lock.
When set, indicates that MLB port is synchronized to the incoming
MLB frame. If MLK is clear (unlocked), it is set after FRAMESYNC is
detected at the same position for three consecutive frames. If MLK is
set (locked), it is cleared after not receiving FRAMESYNC at the
expected time for two consecutive frames. While MLK is set, FRAME-
SYNC patterns occurring at locations other than the expected one are
ignored.
27 M5PS MLB 5-Pin Select.
0 = 3-pin MLB mode
1 = 5-pin MLB mode
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