DPI Signal Routing Unit Registers
A-230 ADSP-214xx SHARC Processor Hardware Reference
DPI Pin Buffer Registers
The DPI_PIN_PULLUP and DPI_PIN_STAT control and return status of the
DAI pin buffers.
Pin Buffer Status Register (DPI_PIN_STAT)
This 16-bit, read-only register is shown in Figure A-130. Bits 13–0 of this
register indicate the status of DPI_PB14–1. Reads from bits 15–14 always
return 0. This register is updated at up to the PCLK/2 rate.
DPI Interrupt Controller Registers
The digital peripheral interface (DPI) also has an interrupt controller,
similar to that in the DAI. All of these interrupts are combined into a sin-
gle interrupt, namely DPI_INT. The DPI_IMASK register contains the status
on individual interrupts. Apart from the
DPI_IRPTL register, there are two
101010 (0x2A) MISCB7_O Miscellaneous Control 7
101011 (0x2B) MISCB8_O Miscellaneous Control 8
101100–111111 Reserved
Figure A-130. DPI_PIN_STAT Register
Table A-120. Group C Signals (Cont’d)
Binary Signal Description (Source Selection)
DPI_PB14
DPI_PB13
DPI_PB12
DPI_PB01
DPI_PB02
DPI_PB03
DPI_PB04
DPI_PB05
DPI_PB06
DPI_PB11
DPI_PB10
DPI_PB09
DPI_PB07
DPI_PB08
09 837564 2114 12 11 101315
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