ADSP-214xx SHARC Processor Hardware Reference A-229
Registers Reference
010000 (0x10) SPIFLG3_PBEN_O Pin Enable for Slave Select 3 from SPI
010001 (0x11) SPIBMISO_PBEN_O Pin Enable for MISO from SPIB
010010 (0x12) SPIBMOSI_PBEN_O Pin Enable for MOSI from SPIB
010011 (0x13) SPIBCLK_PBEN_O Pin Enable for CLK from SPIB
010100 (0x14) SPIBFLG0_PBEN_O Pin Enable for Slave Select 0 from SPIB
010101 (0x15) SPIBFLG1_PBEN_O Pin Enable for Slave Select 1 from SPIB
010110 (0x16) SPIBFLG2_PBEN_O Pin Enable for Slave Select 2 from SPIB
010111 (0x17) SPIBFLG3_PBEN_O Pin Enable for Slave Select 3 from SPIB
011000 (0x18) FLAG4_PBEN_O Pin Enable for Flag 4 Output
011001 (0x19) FLAG5_PBEN_O Pin Enable for Flag 5 Output
011010 (0x1A) FLAG6_PBEN_O Pin Enable for Flag 6 Output
011011 (0x1B) FLAG7_PBEN_O Pin Enable for Flag 7 Output
011100 (0x1C) FLAG8_PBEN_O Pin Enable for Flag 8 Output
011101 (0x1D) FLAG9_PBEN_O Pin Enable for Flag 9 Output
011110 (0x1E) FLAG10_PBEN_O Pin Enable for Flag 10 Output
011111 (0x1F) FLAG11_PBEN_O Pin Enable for Flag 11 Output
100000 (0x20) FLAG12_PBEN_O Pin Enable for Flag 12 Output
100001 (0x21) FLAG13_PBEN_O Pin Enable for Flag 13 Output
100010 (0x22) FLAG14_PBEN_O Pin Enable for Flag 14 Output
100011 (0x23) FLAG15_PBEN_O Pin Enable for Flag 15 Output
100100 (0x24) TWI_DATA_PBEN_O Data Output Enable from TWI
100101 (0x25) TWI_CLK_PBEN_O Clock Output Enable from TWI
100110 (0x26) MISCB3_O Miscellaneous Control 3
100111 (0x27) MISCB4_O Miscellaneous Control 4
101000 (0x28) MISCB5_O Miscellaneous Control 5
101001 (0x29) MISCB6_O Miscellaneous Control 6
Table A-120. Group C Signals (Cont’d)
Binary Signal Description (Source Selection)
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