DAI Default Routing
9-28 ADSP-214xx SHARC Processor Hardware Reference
signal paths enable a number of possible uses and connections for the
DAI/DPI pins. A few examples include:
• One pin’s input can be patched to another pin’s output, allowing
board-level routing under software control.
• A pin input can be patched to another pin’s enable, allowing an
off-chip signal to gate an output from the processor.
• Any of the DAI pins can be used as interrupt sources or gen-
eral-purpose I/O (GPIO) signals.
On the DAI, two dedicated miscellaneous inputs are allowed to invert the
input level on the buffer by a bit setting.
The SRU enables many possible functional changes, both within the pro-
cessor as well as externally. Used creatively, it allows system designers to
radically change functionality at runtime, and to potentially reuse circuit
boards across many products.
DAI Default Routing
When the processor comes out of reset, the SPORT junctions are bi-direc-
tional to the DAI pin buffers (Figure 9-13, Figure 9-14). This allows
systems to use the SPORTs as either master or slave (without changing the
routing scheme). Therefore, programs only need to use the SPORT con-
trol register settings to configure master or slave operation. Note that all
DAI inputs which are not routed by default are tied to signal low.
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