Processor Architectural Overview
1-4 ADSP-214xx SHARC Processor Hardware Reference
• 4 asynchronous sample rate converters (ASRC)
• DTCP encryption
Interrupt Controller
The DAI contains its own interrupt controller that indicates to the core
when DAI audio events have occurred. This interrupt controller offers 32
independently configurable channels.
Signal Routing Unit
Conceptually similar to a “patch-bay” or multiplexer, the SRU provides a
group of registers that define the interconnection of the DAI peripherals
to the DAI pins or to other DAI peripherals.
Digital Peripheral Interface (DPI)
The digital peripheral interface (DPI) unit consists of an interrupt con-
troller, a signal routing unit, and many peripherals:
• 2 serial peripheral interface ports (SPI)
• 3 peripheral timers
• 1 UART
• 1 TWI controller (I
2
C compatible)
Interrupt Controller
The DPI contains its own interrupt controller that indicates to the core
when DPI audio events have occurred. This interrupt controller offers 12
independently configurable channels.
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