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Analog Devices SHARC ADSP-214 Series - Preambles

Analog Devices SHARC ADSP-214 Series
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ADSP-214xx SHARC Processor Hardware Reference C-15
Audio Frame Formats
data do not. Note that the bi-phase mark encoded data always has a transi-
tion between bit boundaries.
Preambles
Preambles are specific patterns that provide synchronization and identify
the subframes and blocks. To achieve synchronization within one sam-
pling period and to make this process completely reliable, these patterns
violate the bi-phase mark code rules, thereby avoiding the possibility of
data imitating the preambles.
A set of three preambles, shown in Table C-2, are used. These preambles
are transmitted in the time allocated to four time slots at the start of each
subframe (time slots 0 to 3) and are represented by eight successive states.
The first state of the preamble is always different from the second state of
the previous symbol (representing the parity bit).
Figure C-6. Bi-phase Mark Encoding
101100
CLOCK
(2 TIMES BIT RATE
DATA
BI-PHASE-MARK
DATA
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