ADSP-214xx SHARC Processor Hardware Reference lxiii
Preface
• Chapter 8, “Media Local Bus”
Details the Media Local Bus port (MLB), an on-PCB or inter-chip
communication bus, which allows an application to access MOST
network data.
• Chapter 9, “Digital Application/Digital Peripheral Interfaces”
Provides information about the digital audio/digital peripheral
interface (DAI/DPI) which allows you to attach an arbitrary num-
ber and variety of peripherals to the SHARC processor while
retaining high levels of compatibility.
• Chapter 10, “Serial Ports”
Describes the eight dual data line serial ports. Each SPORT con-
tains a clock, a frame sync, and two data lines that can be
configured as either a receiver or transmitter pair.
• Chapter 11, “Input Data Port”
Discusses the function of the input data port (IDP) which provides
a low overhead method of routing signal routing unit (SRU) sig-
nals back to the core’s memory.
• Chapter 12, “Asynchronous Sample Rate Converter”
Provides information on the sample rate converter (SRC) module.
This module performs synchronous or asynchronous sample rate
conversion across independent stereo channels, without using any
internal processor resources.
• Chapter 13, “Sony/Philips Digital Interface”
Provides information on the use of the Sony/Philips Digital Inter-
face which is a standard audio file transfer format that allows the
transfer of digital audio signals from one device to another without
having to be converted to an analog signal.
• Chapter 14, “Precision Clock Generator”
Details the precision clock generators (PCG), each of which gener-
ates a pair of signals derived from a clock input signal.
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