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S Mode

C-4 ADSP-214xx SHARC Processor Hardware Reference

The I

S bus transmits audio data from 8–32 bits and control signals over

separate lines. The data line carries two multiplexed data channels—the

left channel and the right channel. In I

S mode, if both channels on a

SPORT are set up to transmit, then the SPORT transmits left and right

S channels simultaneously. If both channels on a SPORT are set up to

receive, the SPORT receives left and right I

S channels simultaneously.

Data is transmitted in MSB-first format.

S consists, as stated above, of a bit clock, a word select and the data line.

The bit clock pulses once for each discrete bit of data on the data lines.

The bit clock operates at a frequency which is a multiple of the sample

rate. The bit clock frequency multiplier depends on number of bits per

channel, times the number of channels. For example, CD Audio with a

sample frequency of 44.1 kHz and 32 bits of precision per (2) stereo chan-

nels has a bit clock frequency of 2.8224 MHz. The word select clock lets

the device know whether channel 1 or channel 2 is currently being sent,

since I

S allows two channels to be sent on the same data line.

Transitions on the word select clock also serve as a start-of-word indicator.

The word clock line pulses once per sample, so while the bit clock runs at

some multiple of the sample frequency, the word clock always matches the

sample frequency. For a two channel (stereo) system, the word clock is a

square wave, with an equal number of bit clock pulses clocking the data to

each channel. In a mono system, the word clock pulses one bit clock

length to signal the start of the next word, but is no longer be square.

Instead, bit clocking transitions occur with the word clock either high or

low.

Note the major difference between I

S and left/right justified modes is a

left MSB data shift by one SCLK cycle in relation to the frame.

Standard I

S data is sent from MSB to LSB, starting at the left edge of the

word select clock, with one bit clock delay. This allows both the transmit-

ting and receiving devices to ignore the audio precision of the remote

Analog Devices SHARC ADSP-214 Series User Manual

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