Analog Devices SHARC ADSP-214 Series - Page 48

Contents
xlviii ADSP-214xx SHARC Processor Hardware Reference
External Port Pin Multiplexing ............................................ 23-29
Multiplexed External Port Pins ........................................ 23-30
Backward Compatibility ................................................. 23-31
Parallel Connection of Flag Pins via External Port and DPI Pins 23-31
High Frequency Design ............................................................ 23-33
Circuit Board Design .......................................................... 23-33
Clock Input Specifications and Jitter ............................... 23-33
RESETOUT .................................................................. 23-34
Input Pin Hysteresis ....................................................... 23-34
Pull-Up/Pull-Down Resistors .......................................... 23-35
Memory Select Pins ........................................................ 23-35
Edge-Triggered I/O ......................................................... 23-35
Asynchronous Inputs ...................................................... 23-36
Decoupling and Grounding ................................................. 23-36
Circuit Board Layout .......................................................... 23-37
Other Recommendations and Suggestions ............................ 23-37
EZ-KIT Lite Schematics ...................................................... 23-39
Oscilloscope Probes ............................................................. 23-39
Recommended Reading ....................................................... 23-39
System Components ................................................................. 23-40
Power Management Circuits ................................................ 23-40
Supervisory Circuits ............................................................ 23-41
Definition of Terms .................................................................. 23-43
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